From 3d3fe1279e2a588758e9731a5e68d636ac7c643a Mon Sep 17 00:00:00 2001
From: Julian Daube <admin@dedaa.de>
Date: Tue, 17 Dec 2019 01:52:32 +0100
Subject: [PATCH] complete bom

---
 BOM.xlsx                    | Bin 0 -> 16744 bytes
 kicad/synth_plate.kicad_pcb | 117 ++++++++++++++++++------------------
 kicad/synth_plate.pro       |  10 +--
 kicad/synth_plate.sch       |   2 +-
 4 files changed, 65 insertions(+), 64 deletions(-)
 create mode 100644 BOM.xlsx

diff --git a/BOM.xlsx b/BOM.xlsx
new file mode 100644
index 0000000000000000000000000000000000000000..1ee67f43977aa993110841d1f45d93ac681dd2c5
GIT binary patch
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literal 0
HcmV?d00001

diff --git a/kicad/synth_plate.kicad_pcb b/kicad/synth_plate.kicad_pcb
index 1239c09..9c85670 100644
--- a/kicad/synth_plate.kicad_pcb
+++ b/kicad/synth_plate.kicad_pcb
@@ -2,8 +2,8 @@
 
   (general
     (thickness 1.6)
-    (drawings 48)
-    (tracks 101)
+    (drawings 49)
+    (tracks 103)
     (modules 17)
     (nets 15)
   )
@@ -50,7 +50,7 @@
     (user_trace_width 0.127)
     (user_trace_width 0.2)
     (user_trace_width 0.6)
-    (trace_clearance 0.254)
+    (trace_clearance 0.127)
     (zone_clearance 0.508)
     (zone_45_only no)
     (trace_min 0.127)
@@ -79,7 +79,7 @@
     (pad_size 1.524 1.524)
     (pad_drill 0.762)
     (pad_to_mask_clearance 0.051)
-    (solder_mask_min_width 0.25)
+    (solder_mask_min_width 0.127)
     (aux_axis_origin 0 0)
     (grid_origin 100 50)
     (visible_elements 7FFFFFFF)
@@ -130,7 +130,7 @@
   (net 14 "Net-(J2-PadSN)")
 
   (net_class "Default" "Dies ist die voreingestellte Netzklasse."
-    (clearance 0.254)
+    (clearance 0.127)
     (trace_width 0.6)
     (via_dia 0.8)
     (via_drill 0.4)
@@ -148,7 +148,7 @@
   )
 
   (net_class "touch" ""
-    (clearance 0.254)
+    (clearance 0.127)
     (trace_width 0.127)
     (via_dia 0.6)
     (via_drill 0.3)
@@ -463,7 +463,7 @@
     (fp_text value "D" (at 3.81 2.12 90) (layer "F.Fab")
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text user "K" (at 0 -1.8 90) (layer "F.SilkS")
+    (fp_text user "K" (at 0 -1.8 90) (layer "F.SilkS") hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_text user "K" (at 0 -1.8 90) (layer "F.Fab")
@@ -785,7 +785,7 @@
     (tags "mounting hole 3.2mm m3")
     (path "/5DF9AC6D")
     (attr virtual)
-    (fp_text reference "H1" (at 0 -4.2) (layer "F.SilkS")
+    (fp_text reference "H1" (at 0 -4.2) (layer "F.SilkS") hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_text value "M3" (at 0 4.2) (layer "F.Fab")
@@ -876,6 +876,9 @@
       (net 6 "Net-(BT1-Pad1)"))
   )
 
+  (gr_text "Touchscreen ribbon synthesizer" (at 150 53.5) (layer "B.SilkS")
+    (effects (font (size 1.5 1.5) (thickness 0.3)) (justify mirror))
+  )
   (gr_line (start 186 52) (end 188.5 52) (layer "B.SilkS") (width 0.12))
   (gr_line (start 186 53) (end 186 52) (layer "B.SilkS") (width 0.12))
   (gr_line (start 186 56) (end 186 55) (layer "B.SilkS") (width 0.12))
@@ -929,6 +932,8 @@
   (gr_line (start 200 54) (end 200 96) (layer "Edge.Cuts") (width 0.05))
   (gr_line (start 104 50) (end 196 50) (layer "Edge.Cuts") (width 0.05))
 
+  (via (at 107 67.5) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1))
+  (via (at 104.5 69.5) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1))
   (segment (start 105.511846 89.788154) (end 103.715795 91.584205) (width 0.6) (layer "F.Cu") (net 5))
   (via (at 107.3 61.5) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 2))
   (segment (start 107.3 61.5) (end 104.5 61.5) (width 0.6) (layer "F.Cu") (net 2) (tstamp 5DF87E05))
@@ -1066,57 +1071,53 @@
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diff --git a/kicad/synth_plate.pro b/kicad/synth_plate.pro
index d77e190..5f7ca52 100644
--- a/kicad/synth_plate.pro
+++ b/kicad/synth_plate.pro
@@ -1,4 +1,4 @@
-update=15.12.2019 02:41:20
+update=17.12.2019 01:20:54
 version=1
 last_client=kicad
 [general]
@@ -63,10 +63,10 @@ OthersTextSizeH=1
 OthersTextSizeThickness=0.15
 OthersTextItalic=0
 OthersTextUpright=0
-DimensionUnits=0
+DimensionUnits=2
 DimensionPrecision=1
 SolderMaskClearance=0.051
-SolderMaskMinWidth=0.25
+SolderMaskMinWidth=0.127
 SolderPasteClearance=0
 SolderPasteRatio=-0
 [pcbnew/Layer.F.Cu]
@@ -238,7 +238,7 @@ Enabled=0
 [pcbnew/Netclasses]
 [pcbnew/Netclasses/Default]
 Name=Default
-Clearance=0.254
+Clearance=0.127
 TrackWidth=0.6
 ViaDiameter=0.8
 ViaDrill=0.4
@@ -249,7 +249,7 @@ dPairGap=0.25
 dPairViaGap=0.25
 [pcbnew/Netclasses/1]
 Name=touch
-Clearance=0.254
+Clearance=0.127
 TrackWidth=0.127
 ViaDiameter=0.6
 ViaDrill=0.3
diff --git a/kicad/synth_plate.sch b/kicad/synth_plate.sch
index bad68e1..441a6be 100644
--- a/kicad/synth_plate.sch
+++ b/kicad/synth_plate.sch
@@ -199,7 +199,7 @@ L Device:D D2
 U 1 1 5DF7A920
 P 4300 3350
 F 0 "D2" V 4254 3429 50  0000 L CNN
-F 1 "D" V 4345 3429 50  0000 L CNN
+F 1 "1N4148" V 4345 3429 50  0000 L CNN
 F 2 "Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal" H 4300 3350 50  0001 C CNN
 F 3 "~" H 4300 3350 50  0001 C CNN
 	1    4300 3350